SESE Computer Science

PPSC FPSC KPPSC BPSC SPSC Lecturer Computer Science Test 52

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There will be 25 multiple choice question in the test.
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Test Instructions:-
Test Name	Lecturer Computer Science
Subject	Computer Science Test 52
Test Type	MCQs
Total Questions	25
Total Time	20 Minutes
Total Marks	100

You have 20 minutes to pass to the quiz.

Lecturer Computer Science Online Test No. 52

1 / 25

Program counter (P(C) contains:

Address of an instruction to be fetched

Instructions most recently fetched

Data to be written into memory

Data to be read from memory

2 / 25

User-visible register:

Enables machine language programmer to minimize main memory reference by optimizing register use.

Enables assembly language programmer to minimize main memory reference by optimizing register use.

A and B both true.

A and B both false.

3 / 25

Which of the following is not an address register?

Index register

Segment pointer

Stack pointer

Data register

4 / 25

The operating system control tables maintains file table, because:

These tables manage I/O devices and channels of the computer system.

These tables provide information about the existence of files, their location on secondary memory and their current status.

These tables provide information to manage process.

None of these.

5 / 25

The main memory of the computer:

Controls the operations of computer.

Performs data processing functions.

Stores data and programs.

None of these.

6 / 25

In cluster:

Computers communicate with each other’s via fixed paths or via some network facilities

Computer communicates with each other’s via a shared memory.

Both (A) and (B)

None of these.

7 / 25

The Windows 2000, operating system supports:

Multiple user processes with single thread per process.

Multiple processes with multiple thread per process.

Single process with single thread.

Single process with multiple threads.

8 / 25

I/O OBR (I/O Buffer register) is:

Used for the exchange of data between an I/O module and the processor.

Specifies particular I/O device.

(A) and (B) both true.

(A) and (B) both false.

9 / 25

I/O tables are used:

To assign I/O devices of computer

To manage I/O devices of computer system

A and B both true

A and B both false.

10 / 25

Memory buffer register (MBR) contains:

Data that is to be written into memory

A particular I/O device

Exchange data between I/O module and the processor

The instruction most recently fetched

11 / 25

The Window 2000 (W2K) and Linux are the example of:

User Level Thread (ULT)

Kernel Level Thread (KLT)

A and B both

None of these.

12 / 25

The MS-DOS an operating system supports:

Single user process and multiple threads

Multiple user process and single thread

Single user process and single thread

Multiple user processes and multiple threads.

13 / 25

IR (Instruction register):

Contains the address of an instruction to be fetched.

Contains the instruction most recently fetched

Specifies memory addresses.

None of these.

14 / 25

The operations of the processor are supervised by:

Control and Status register

Data register.

Address register.

None of these

15 / 25

The Linux operating system supports:

Single thread per process and single process.

Multiple thread per process and single process.

Single thread per process and multiple processes.

Multiple thread per process and multiple processes.

16 / 25

Memory table is used:

To allocate main memory to processes

To allocate secondary memory to processes

To manage virtual memory

A, B and C are true.

17 / 25

Following is not the state of Five-State process model:

Ready

Running

Not Running

New

18 / 25

The UNIX, an operating system supports:

Multiple user processes and single thread per process.

Multiple user processes and multiple threads per process.

Single user process and single thread per process.

Single user process and multiple threads per process.

19 / 25

I/O modules move data:

Between external environment and computer

In the computer main memory

In Processors

None of these.

20 / 25

Processor in computer:

Controls the operations of the computer/ processes data functions.

Stores data and program.

Moves data between computer and its external environment.

None of these.

21 / 25

MAR (memory address register):

Contains data to be written into memory.

Contains data to be read from memory.

Specifies location in memory for next read/or writer.

Contains address of next instruction to be fetched.

22 / 25

The following is not an advantage of User Level Threads (ULT):

Thread switching does not requires kernel mode privileges because all of the thread management are within the user address space of a single process.

Here scheduling can be application specific.

ULT can be run an any operating system.

When ULT executes a system call, not only that thread blocked, but all of the threads within the process are blocked.

23 / 25

User-Visible register Which of the following do not support GUI (Graphical User Interface):

DOS

WINDOWS

Linux

None of these.

24 / 25

The Java run time environment is an example of:

Single user process with multiple threads

Multiple user processes with single thread per process.

Multiple user processes with multiple threads per process.

None of these.

25 / 25

The Vector and array processors fall into:

Single Instruction Single Data (SIS(D) stream

Single Instruction Multiple Data (SIM(D) stream.

Multiple Instruction Single Data (MIS(D) stream.

Multiple Instruction Multiple Data (MIM(D) system.

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